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AD7177-2 - Sigma-Delta ADC

Description

32-bit data output Fast and flexible output rate: 5 SPS to 10 kSPS Channel scan data rate of 10 kSPS/channel (100 µs settling) Performance specifications 19.1 noise free bits at 10 kSPS 20.2 noise free bits at 2.5 kSPS 24.6 noise free bits at 5 SPS INL: ±1 ppm of FSR 85 dB filter rejection of 50 Hz

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Data Sheet 32-Bit, 10 kSPS, Sigma-Delta ADC with 100 µs Settling and True Rail-to-Rail Buffers AD7177-2 FEATURES GENERAL DESCRIPTION 32-bit data output Fast and flexible output rate: 5 SPS to 10 kSPS Channel scan data rate of 10 kSPS/channel (100 µs settling) Performance specifications 19.1 noise free bits at 10 kSPS 20.2 noise free bits at 2.5 kSPS 24.6 noise free bits at 5 SPS INL: ±1 ppm of FSR 85 dB filter rejection of 50 Hz and 60 Hz with 50 ms settling User configurable input channels 2 fully differential channels or 4 single-ended channels Crosspoint multiplexer On-chip 2.
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